/*
 * mnm.c
 *
 *  Created on: Apr 25, 2013
 *      Author: Daniel
 */

#include "DSP28x_Project.h"
#include "mnm.h"

void InitMNM(void) {
	InitMNM_Offsets();
	InitMNM_CTRL_REGS();
}

void InitMNM_Offsets(void) {
	int i;
	do {
		I2caRegs.I2CSTR.all = I2C_CLR_NACK_BIT;		// clear the NACK bit
		while(I2caRegs.I2CSTR.bit.BB == 1);			// wait until the bus is no longer busy
		I2caRegs.I2CSAR = MNM_I2C_Address;			// tell the I2C peripheral where we're transmitting
		I2caRegs.I2CCNT = MNM_NUMBYTES_OFFSETS;		// tell the I2C peripheral how many bytes we're transmitting

		for(i = 0; i < MNM_NUMBYTES_OFFSETS; i++) {
			while(I2caRegs.I2CSTR.bit.XRDY == 0);	// wait until the previous byte has moved to the shift register
													// before sending the next one
			switch(i) {
			case 0:		I2caRegs.I2CDXR = MNM_ADDR_OFF_X_MSB;		break;		// send the address of the first register
			case 1:		I2caRegs.I2CDXR = MNM_INIT_OFF_X_MSB;		break;		// each of these bytes is written in sequence
			case 2:		I2caRegs.I2CDXR = MNM_INIT_OFF_X_LSB;		break;		// starting at the register address (first byte sent)
			case 3:		I2caRegs.I2CDXR = MNM_INIT_OFF_Y_MSB;		break;
			case 4:		I2caRegs.I2CDXR = MNM_INIT_OFF_Y_LSB;		break;
			case 5:		I2caRegs.I2CDXR = MNM_INIT_OFF_Z_MSB;		break;
			case 6:		I2caRegs.I2CDXR = MNM_INIT_OFF_Z_LSB;		break;
			}
		}

	}while(I2caRegs.I2CSTR.bit.NACK == 1);
}

void InitMNM_CTRL_REGS(void) {
	int i;
	do {
		I2caRegs.I2CSTR.all = I2C_CLR_NACK_BIT;		// clear the NACK bit
		while(I2caRegs.I2CSTR.bit.BB == 1);			// wait until the bus is no longer busy
		I2caRegs.I2CSAR = MNM_I2C_Address;			// tell the I2C peripheral where we're transmitting
		I2caRegs.I2CCNT = MNM_NUMBYTES_CTRL_REGS;		// tell the I2C peripheral how many bytes we're transmitting

		for(i = 0; i < MNM_NUMBYTES_CTRL_REGS; i++) {
			while(I2caRegs.I2CSTR.bit.XRDY == 0);	// wait until the previous byte has moved to the shift register
													// before sending the next one
			switch(i) {
			case 0:		I2caRegs.I2CDXR = MNM_ADDR_CTRL_REG1;		break;		// send the address of the first register
			case 1:		I2caRegs.I2CDXR = MNM_INIT_CTRL_REG1;		break;		// each of these bytes is written in sequence
			case 2:		I2caRegs.I2CDXR = MNM_INIT_CTRL_REG2;		break;		// starting at the register address (first byte sent)
			}
		}

	}while(I2caRegs.I2CSTR.bit.NACK == 1);}

void MNM_read_all(Uint16 * results) {
	int i;
	do {
		I2caRegs.I2CSTR.all = I2C_CLR_NACK_BIT;
		while(I2caRegs.I2CSTR.bit.BB == 1);
		I2caRegs.I2CSAR = MNM_I2C_Address;
		I2caRegs.I2CCNT = MNM_NUMBYTES_POLL;

		while(I2caRegs.I2CSTR.bit.XRDY == 0);
		I2caRegs.I2CDXR = MNM_ADDR_OUT_X_MSB;

		I2caRegs.I2CMDR.all = 0x2620;				// issue a START command (no stop)

		while(I2caRegs.I2CSTR.bit.ARDY) {			// wait for the transmission to finish
			if(I2caRegs.I2CSTR.bit.NACK == 1) {		// if we get a NACK during this transmission
				I2caRegs.I2CMDR.bit.STP = 1;		// issue a STOP
				break;
			}
		}

	} while(I2caRegs.I2CSTR.bit.NACK == 1);


	do {
		while(I2caRegs.I2CSTR.bit.BB == 1);
		I2caRegs.I2CSAR = MNM_I2C_Address;
		I2caRegs.I2CCNT = MNM_NUMBYTES_READ_ALL;
		I2caRegs.I2CMDR.all = 0x2C20;					// issue a restart command

		while(I2caRegs.I2CMDR.bit.STP == 1) {			// wait for the slave to finish transmitting
			if(I2caRegs.I2CSTR.bit.NACK == 1) {		// if we get a NACK during this transmission
				break;
			}
		}
	} while(I2caRegs.I2CSTR.bit.NACK == 1);

	for(i = 0; i < MNM_NUMBYTES_READ_ALL; i++) {
		while(I2caRegs.I2CSTR.bit.RRDY == 0);
		results[i] = I2caRegs.I2CDRR;
	}
}
